seveibar/f1c100s-dev-board

This code defines the hardware layout and schematic for a four-layer F1C100S-based module, including footprint placement, pin mappings, power regulation, decoupling capacitors, support components, and routing configurations, enabling automated PCB generation, routing, and verification.

Version
1.3.0
License
unset
Stars
0

package.json

{
  "name": "@tsci/seveibar.f1c100s-dev-board",
  "version": "1.3.0",
  "description": "Compact 62x48mm four-layer F1C100S Linux dev board with JST SPI, I2C, USB/UART programming and GPIO RGB",
  "main": "index.circuit.tsx",
  "keywords": [
    "tscircuit",
    "circuit",
    "pcb",
    "electronics"
  ],
  "scripts": {
    "dev": "tsci dev",
    "build": "tsci build index.circuit.tsx --disable-parts-engine --autorouter-timeout 120s --pcb-svgs --schematic-svgs",
    "snapshot": "tsci snapshot",
    "snapshot:update": "tsci snapshot --update",
    "start": "tsci dev",
    "typecheck": "tsc --noEmit",
    "verify": "node scripts/verify.mjs",
    "test:module": "bun test modules/f1c100s/tests"
  },
  "devDependencies": {
    "@tscircuit/capacity-autorouter": "0.0.892",
    "@types/bun": "^1.4.2",
    "@types/react": "^19.3.0",
    "tscircuit": "0.0.2495",
    "typescript": "^5.0.0"
  },
  "author": "seveibar"
}