seveibar/f1c100s-dev-board
This code defines the hardware layout and schematic for a four-layer F1C100S-based module, including footprint placement, pin mappings, power regulation, decoupling capacitors, support components, and routing configurations, enabling automated PCB generation, routing, and verification.
- Version
- 1.3.0
- License
- unset
- Stars
- 0
footprints/README.md
# Cached KiCad footprints
Source: KiCad official footprint library, through https://kicad-mod-cache.tscircuit.com/. Cached for reproducible builds. The cached JSON omits placeholder silkscreen text. The JSX renderer preserves pads, pad numbering, pad geometry, silkscreen body outlines, and courtyards. Fabrication-note graphics remain in the JSON but are not rendered by this small adapter. KiCad libraries use CC-BY-SA-4.0 with the board-design exception.
- jst6.json: Connector_JST/JST_PH_B6B-PH-K_1x06_P2.00mm_Vertical
- jst4.json: Connector_JST/JST_PH_B4B-PH-K_1x04_P2.00mm_Vertical
- so8.json: Package_SO/SOIC-8_3.9x4.9mm_P1.27mm
- flash.json: Package_SO/SOIC-8_5.3x5.3mm_P1.27mm
- reset.json: Button_Switch_SMD/SW_SPST_TL3342
- rgb.json: LED_SMD/LED_RGB_Wuerth-PLCC4_3.2x2.8mm_150141M173100
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