astra/f1c100s
This code defines and renders a four-layer, top-mounted F1C100S module with detailed pin assignments, schematic annotations, and layout profiles, facilitating design, validation, and routing of the hardware including support for decoupling capacitors, crystal oscillators, and external connectors.
- Version
- 0.11.0
- License
- unset
- Stars
- 0
src/generated/lcd_top_storage_bottom.metrics.json
PCB
Schematic
{
"profile": "lcd_top_storage_bottom",
"inputHash": "7f5fde2addacc4a468ee12638bc9678524d6030e73b45448895d1674743b547b",
"moduleSizeMm": 28,
"rules": {
"traceWidth": 0.12,
"clearance": 0.1,
"viaDiameter": 0.45,
"viaDrill": 0.2,
"layers": 4
},
"platedTestPoints": 71,
"nonTopExitContacts": 69,
"traces": 176,
"wireSegments": 1094,
"vias": 213,
"capacitors": 32,
"localDecouplers": 15,
"routedLengthMm": 1413.044,
"usbDmLengthMm": 8.251748,
"usbDpLengthMm": 8.251805,
"usbSkewMm": 0.000057,
"drcErrors": 0,
"optimization": {
"before": {
"platedTestPoints": 71,
"nonTopExitContacts": 69,
"traces": 176,
"wireSegments": 3629,
"vias": 245,
"capacitors": 32,
"localDecouplers": 15,
"routedLengthMm": 1484.744,
"usbDmLengthMm": 8.251748,
"usbDpLengthMm": 8.251805,
"usbSkewMm": 0.000057
},
"after": {
"platedTestPoints": 71,
"nonTopExitContacts": 69,
"traces": 176,
"wireSegments": 1094,
"vias": 213,
"capacitors": 32,
"localDecouplers": 15,
"routedLengthMm": 1413.044,
"usbDmLengthMm": 8.251748,
"usbDpLengthMm": 8.251805,
"usbSkewMm": 0.000057
}
}
}