imrishabh18/corne-keyboard
The code defines and renders two surface-mount chip components with SMT pads, silkscreen outlines, and 3D CAD models (OBJ and STEP) for PCB assembly.
- Version
- 2.0.21
- License
- unset
- Stars
- 1
scripts/test-export-assembly.py
import importlib.util,unittest,tempfile,zipfile,io,csv
from pathlib import Path
spec=importlib.util.spec_from_file_location('export_assembly',Path(__file__).with_name('export-assembly.py'))
module=importlib.util.module_from_spec(spec);spec.loader.exec_module(module)
class AssemblyExportTest(unittest.TestCase):
def test_dnp_switch_is_excluded_but_socket_and_drills_remain(self):
circuit=[{'type':'source_component','source_component_id':'switch','name':'SW1_KEY'}, {'type':'source_component','source_component_id':'socket','name':'SW1'}, {'type':'pcb_component','source_component_id':'switch','do_not_place':True}, {'type':'pcb_component','source_component_id':'socket','do_not_place':False}]
with tempfile.TemporaryDirectory() as directory:
raw=Path(directory)/'raw.zip';out=Path(directory)/'out.zip'
with zipfile.ZipFile(raw,'w') as archive:
archive.writestr('bom.csv','Designator,Part\nSW1_KEY,C400230\nSW1,C5333465\n')
archive.writestr('pick_and_place.csv','Designator,Layer\nSW1_KEY,top\nSW1,bottom\n')
archive.writestr('drill_npth.drl',b'KEEP SWITCH LOCATING HOLES\n')
module.filter_assembly_zip(raw,out,circuit)
with zipfile.ZipFile(out) as archive:
self.assertEqual(archive.read('drill_npth.drl'),b'KEEP SWITCH LOCATING HOLES\n')
for name in ['bom.csv','pick_and_place.csv']:
self.assertEqual([r['Designator'] for r in csv.DictReader(io.StringIO(archive.read(name).decode()))],['SW1'])
def test_missing_populated_component_is_an_error(self):
circuit=[{'type':'source_component','source_component_id':'socket','name':'SW1'}, {'type':'pcb_component','source_component_id':'socket'}]
with tempfile.TemporaryDirectory() as directory:
raw=Path(directory)/'raw.zip'
with zipfile.ZipFile(raw,'w') as archive:
archive.writestr('bom.csv','Designator,Part\n')
archive.writestr('pick_and_place.csv','Designator,Layer\n')
with self.assertRaisesRegex(ValueError,'population mismatch'):
module.filter_assembly_zip(raw,Path(directory)/'out.zip',circuit)
if __name__=='__main__':unittest.main()