MustafaMulla29/stride-pedometer

docs/design.md

# Stride Rev A — design and assembly notes

This is a chip-level pedometer prototype in tscircuit. The assumed outline is 40 × 35 mm, with a protected 100 mAh, 4.2 V rechargeable LiPo and a display that turns on briefly when requested. The promised separate workspace breakdown was not present in this task's directory; these dimensions and battery are provisional.

## Circuit architecture

```mermaid
flowchart LR
  Dock[5 V charging contacts] --> Charger[BQ25150 charger / power path]
  Cell[Protected 100 mAh LiPo] <--> Gauge[BQ27427 high-side fuel gauge]
  Gauge <--> Charger
  Charger --> PMID[PMID: battery or input supply]
  PMID --> LDO[TPS7A02: always-on 3 V]
  LDO --> MCU[CC2340R5]
  LDO --> Accel[BMA400 hardware step counter]
  PMID --> Boost[TPS61046: switched 7.3 V]
  Charger --> Logic[Switched 3 V display logic]
  Boost --> OLED[Bare 128 × 32 OLED glass]
  Logic --> OLED
  MCU <--> Accel
  MCU <--> Gauge
  MCU <--> Charger
  MCU --> OLED
  MCU --> RF[LC matching network + ceramic antenna]
```

The board contains no Bluetooth, accelerometer, charger, or display breakout modules. DS1 is bare COG OLED glass with an SSD1306 controller bonded to the glass and a solderable flex tail. It is installed separately after PCB reflow.

## Selected principal parts

| Ref | Manufacturer part | JLCPCB / LCSC | Purpose |
|---|---|---|---|
| U1 | CC2340R52E0RKPR | C5914214 | BLE MCU, 40-pin 5 mm QFN |
| U2 | BQ25150YFPR | C2868498 | Charger, power path, switched display LDO |
| U3 | BQ27427YZFR | C6075475 | Fuel gauge with internal high-side sense resistor |
| U4 | BMA400 | C437655 | Hardware step counting |
| U5 | TPS7A0230PDBVR | C3747031 | 3 V, low quiescent current regulator |
| U6 | TPS61046YFFR | C181551 | OLED high-voltage boost |
| DS1 | X091-2832TSWFG02-H14 | C18723017 | 0.91-inch 128 × 32 OLED glass |
| ANT1 | 2450AT18A100E | C89334 | 2.4 GHz ceramic antenna |
| Y1 | XC32M4-48.000-F08NLDT | C2925606 | 48 MHz, 8 pF, ≤40 Ω crystal |
| Y2 | SC-32S32.768kHz20PPM7pF | C97604 | 32.768 kHz sleep clock |

The catalog was checked during this design session on 2026-09-06. Most passives use JLC basic parts; the principal ICs require extended assembly. Stock and assembly service availability must be rechecked when quoting. The 40-pin MCU and bare display had substantially lower stock than common passives. Catalog presence does not mean a particular JLC assembly service accepts every package.

## Power and charging

PMID can approach the 5 V dock input, so it must not power the MCU directly. U5 supplies the always-on 3 V rail independently of charger register state. The MCU uses its internal DC/DC converter with L1 and the TI reference decoupling arrangement.

All charge and discharge current goes through U3: **cell positive → PACK_P / gauge BAT → internal sense resistor → gauge SRX / BAT_SYS → charger BAT**. Do not connect PACK_P directly to PMID or BAT_SYS. The gauge's VDD pin is an internal regulator output with its own capacitor, not a system supply.

Use a **protected single-cell pack**, rated for the chosen charge current, with a 10 kΩ NTC in thermal contact with the cell. J2 pins are PACK_P, GND, and TS. R2 is a parallel 10 kΩ resistor for the charger's thermistor network. Confirm the actual pack's NTC curve and hot/cold thresholds before enabling charging. Do not substitute a bare unprotected cell: this board relies on the pack for independent overcharge, overdischarge, and short-circuit protection.

The provisional fast-charge target is 20 mA (0.2 C for 100 mAh). R1 = 560 Ω limits the charger's current code to approximately 19; that corresponds to approximately 23.75 mA in the 1.25 mA range, or 47.5 mA in the 2.5 mA range, before tolerances. R1 is a backup limit, not the requested current setting. CE is pulled high to disable charging until firmware configures and verifies the registers.

Hold LP low in battery standby; raise it before charger I²C transactions and wait the datasheet wake time. Disable unused ADC conversions. Configure the charger watchdog deliberately: its default timeout can restore the default 1.8 V OLED logic supply. Keep the charging safety timer and temperature checks enabled. The button connects only to the charger's battery-domain MR input. Configure PG as the level-shifted MR signal for the MCU; MR must not be connected directly to a 3 V GPIO.

## OLED supply and assembly

The selected glass's internal charge-pump VBAT range starts at 3.5 V. A directly connected LiPo would fall below that during discharge. This board instead follows the manufacturer's **external VCC mode**: internal pump disabled, 7.3 V at VCC, switched 3 V at VDD and VBAT. C1P/C1N/C2P/C2N and VBREF are unconnected as shown in that mode's application circuit. IREF uses 560 kΩ to ground; VCOMH has a 2.2 µF / 16 V capacitor.

U6's 82 kΩ / 10 kΩ divider gives 7.314 V using its nominal 0.795 V reference. Use the measured output voltage and ripple as the final acceptance criterion. Check effective MLCC capacitance under DC bias. L3 is rated for 1 A saturation current; the intended display load is much lower than the regulator's maximum capability.

Power-up: keep boost disabled and reset asserted; enable the charger's 3 V LDO; release reset after the glass's specified delay; configure the SSD1306 for external VCC (`8D 10`); enable the boost; wait at least 100 ms before display-on. Power-down: send display-off, disable the boost, allow VCC to discharge, then disable logic power and make display GPIOs high impedance without internal pullups. The 92 kΩ divider discharges the nominal 4.7 µF VCC capacitor with a 0.432 s time constant; allow at least 2.5 s before removing VDD and verify this on the assembled board. Do not block the MCU awake during that delay.

The custom DS1 footprint is the flex solder tail, not the glass outline. It uses 14 pads at 0.62 mm pitch. Verify pin 1 from the vendor drawing before soldering. The folded flex, insulating spacer, glass support, and case require a mechanical fit check using a real display. No glass, battery foil, enclosure metal, or cable may cover the antenna corner. The flat supplier footprint is retained in `imports/` for reference.

## PCB construction and RF

Intended construction: four layers, 0.8 mm FR-4, top assembly, and a ground pour on inner1. Routing uses tscircuit 0.0.2465's default local Pipeline 9 (`autorouter="auto"`) in two phases: CHG_CE, CHG_LP, CHG_IRQ, and IMAX first with native via-in-pad support, then the remaining board. The final simplification phase was removed because it introduced a Gerber short and invalid layer transitions. Moving R5 right by 0.2 mm then cleared the remaining clearance error. The rebuilt project passes the compiled error checks, strengthened routing checks, and Gerber shorts check. There is no custom algorithm, saved route replay, or explicit `<via />` element. See `review/VALIDATION.md`.

Fine-pitch routing rules remain 0.09 mm track/space, with 0.15 mm via holes and 0.25 mm via pads. All vias are through vias. Vias in solder lands require filled and copper-capped construction. Match the final design to the fabricator's full drill/copper rules and inspect the chip-scale and QFN solder joints. The functional audit identifies an undersized U6 import and additional design work; the routing result is not a manufacturing release.

Charger pad diameter was corrected to 0.23 mm from the library import. The 0.25 mm via land at an inner ball needs a fabricator-reviewed solder-mask and capped-via construction. Confirm the stencil and paste apertures, exposed-pad paste reduction, solder-mask dams, drill tolerances, and pin-1 rotations with the assembler. Add panel tooling and fiducials during panelization.

The MCU matching values follow the TI 40-pin reference: 1.5 pF shunt, 2.8 nH series, 1.5 pF shunt, then 15 pF DC block. R18 starts at 0 Ω; C29/C30 are tuning pads and start unpopulated. C24/C25 also start unpopulated; set the MCU's internal oscillator capacitance for Y1 and measure frequency accuracy.

The 6.5 × 6.5 mm antenna corner has a keepout on all layers. RF links are declared using ordinary `pcbStraightLine` trace elements, but the native router can reshape them. Review the actual RF paths and their ground reference before fabrication; measurements of the current generated copper are in `review/critical-route-metrics.json`. There are no manually placed ground-stitching or exposed-pad vias; inspect the return paths and exposed-pad grounding produced by the default router. The present 0.18 mm RF width is **provisional**: calculate 50 Ω using the exact fabricator stackup and validate the launch, matching network, antenna, enclosure, and battery placement with a VNA. A copied matching network alone does not establish RF performance.

## First-board bring-up

1. Inspect/X-ray the WLCSP and QFN joints; check resistance between each supply and ground before applying power.
2. Use a current-limited bench supply or battery simulator at the pack pads initially. Confirm gauge supply, PMID, 3 V, MCU VDDR, and absence of voltage on OLED VCC while boost is off.
3. Connect SWD to TP1–TP5: 3 V reference, GND, SWDIO, SWCLK, RESETN. Use a 3 V-compatible TI-supported probe. Do not power the board simultaneously from conflicting probe and battery sources.
4. Confirm I²C device identities and voltages before enabling the charger or display. Configure charge voltage/current, NTC behavior, safety timer, watchdog, and readback with CE still high.
5. Test display rail sequencing and discharge on a scope. Confirm there is no GPIO back-power when display logic is off.
6. Measure sleep, step counting, advertising, connected BLE, and display current separately. Test step accuracy for the intended wrist or pocket position.
7. Verify real-cell charging and termination under controlled conditions, then initialize and learn the gauge for that cell. Perform antenna tuning and range tests with the final mechanical assembly.

## Primary references

- [TI CC2340R5 datasheet](https://www.ti.com/lit/ds/symlink/cc2340r5.pdf)
- [TI 40-pin CC2340R5 reference schematic](https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/156/MCU108A_5F00_LP_2D00_EM_2D00_CC2340R5_5F00_SCH.pdf)
- [TI BQ25150 datasheet](https://www.ti.com/lit/ds/symlink/bq25150.pdf)
- [TI BQ27427 datasheet](https://www.ti.com/lit/ds/symlink/bq27427.pdf)
- [Bosch BMA400 datasheet](https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bma400-ds000.pdf)
- [Wisevision OLED specification and external VCC application](https://datasheet.lcsc.com/datasheet/pdf/293805b83cbd2adf5057f47431bcbc3e.pdf?productCode=C18723017)
- [TI TPS7A02 datasheet](https://www.ti.com/lit/ds/symlink/tps7a02.pdf)
- [TI TPS61046 datasheet](https://www.ti.com/lit/ds/symlink/tps61046.pdf)
- [Johanson antenna layout guidance](https://www.johansontechnology.com/datasheets/2450AT18A100/2450AT18A100.pdf)
- [HCI crystal drawing](https://datasheet.lcsc.com/datasheet/pdf/d2f37d2fac78d1d5d89a7432e8c23baa.pdf?productCode=C2925606)
- [JLCPCB manufacturing capabilities](https://jlcpcb.com/capabilities/pcb-capabilities)