0hmX/am62l-lpddr4-breakout-repro

This code defines the physical layout, pin assignments, and power connections for the TI AM62L system-on-chip with DDR4/LPDDR4 memory, including detailed component placement, decoupling capacitors, and signal traces for a 6-layer PCB design.

Version: 1.0.14
License: unset
Stars: 0

comparison/metrics.json

{
  "before": {
    "breakoutPaddingMm": 1,
    "breakoutPointSpacingMm": 0.50256,
    "validBoundaryPoints": 14,
    "totalBreakoutPoints": 22,
    "routedFanoutConnections": 0,
    "totalFanoutConnections": 22,
    "routedGlobalConnections": 0,
    "totalGlobalConnections": 11,
    "pcbTraces": 0,
    "pcbVias": 0
  },
  "after": {
    "breakoutPaddingMm": 0.5,
    "breakoutPointSpacingMm": 0.29,
    "validBoundaryPoints": 22,
    "totalBreakoutPoints": 22,
    "routedFanoutConnections": 22,
    "totalFanoutConnections": 22,
    "routedGlobalConnections": 11,
    "totalGlobalConnections": 11,
    "pcbTraces": 33,
    "pcbVias": 24
  },
  "paddingReductionPercent": 50,
  "spacingReductionPercent": 42.3,
  "validation": {
    "netlistErrors": 0,
    "netlistWarnings": 0,
    "placementErrors": 0,
    "placementWarnings": 0,
    "autoroutingErrors": 0,
    "copperShorts": 0
  }
}